T3_REF_DDR3_8X4_V1_0_Layout_note.docx

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1、T3_REF_DDR3_8X4_V1_O1.ayoutNote1Stackup-Impadence-TraceWidth-SixkupStruaureimpedanceRejutfmentsLayerTypeThckness(mil)Dk(WrthSimZ0)impedancespec(OhmS)ReferencelayerWidtrvspace(mil)SimZO(OhfnS)so*dermask05SM4251TOP1603ozpatig50110%2452189010%245/7503110%238/87985prepreq2942GND10.605ozcore40423SG10605X

2、50110%2&44502901%2&445/759032IOo=10%2&438/879892prepreq70454GND20.605(core4045SIG20.605(K5010%547450290110%5&745/75903211%5&738/879892prepreq70456SIG31.60.55010%7452189010%745/7.59003IooI;10%738/8798.5core40427POWER1060510miIe3间距单端：外层线与线的间距(AirGap)8mil,内层28mil0差分线：到其他网络走线间距212mil0电源与地：到其他网络走线的间距N12m

3、ilVREF：到其他网络走线的间距28milBGA区域里:线与线如里；线与SMDPIN4mil：线与过孔4mil04拓扑DQ：单点对单点DQSDQSB：单点对单点Ax、BAxCAS、RAS、WE、CSxODTxxCKEx、RST：远端簇型F600mil,E-F+/-50mil.对于四片颗粒：A,B700mil,A-B+/-50mil,C,D900mil,C-D+/-50mil4,CK、CKB：远端簇型对于四片颗粒：C,D,E,F500mil,C-D+/-50mil,E-F+/-50mil,G,H800mil,G-HRAS、WE、CSxODTx、CKEx：相对于CK/CKB信号做等长，误差范围为

4、+/-600milDQSX与DQSBX等长，等长误差范围为+/-IOmiLCK与CKB等长，等长误差范围为+/-IOmilo信号线做等长时要考虑过孔长度的影响电源、地平面平面比较完整，调整好过孔的位置、间距，减少对电源、地平面的破坏。平面断开处用走线连接电源、地平面同时也是信号的参考层要求，不能有信号线的参考层被割断的现象7滤波电容:对于单面布局：尽量靠近电源PIN放置，每个电容至少各一个电源过孔和地过孔。对于双面布局：最好能放置在电源管脚下方的PCB背面，每个电容至少各个电源过孔和地过孔。不同容值的电容均匀分布。1.DeclarationThisdocumentistheoriginalwo

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